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Mentor, a Siemens business, today announced the availability of automotive-grade automatic test pattern generation (ATPG) technology for its Tessent™ TestKompress™ software. The new technology includes a suite of fault models and test pattern generation applications that target defects in ICs at the transistor and interconnect levels – in the process helping customers capture defects that would otherwise go undetected with traditional methodologies. ISO 26262 reliability requirements demand zero defective parts per million (DPPM), and Tessent TestKompress Automotive-grade ATPG substantially assists the makers of digital ICs in achieving this goal.
Leveraging the proven layout-based design and library cell models used by the Tessent Diagnosis tool, together with advanced critical area analysis (CAA) of the defect locations, users can automate the generation of manufacturing test patterns that effectively target defects at the transistor level inside cells, between adjacent cells, and in the interconnect based on critical area.
Published manufacturing test results demonstrate that these new Tessent TestKompress pattern types uniquely detect defects. By integrating all of these technologies into the Tessent TestKompress test pattern generation tool, users can reach DPPM levels that would otherwise only be possible by combining ATPG patterns with extremely expensive functional or system-level tests.
“With the automotive-grade ATPG capability in Tessent TestKompress, we have been able to detect defects that were not otherwise captured,” said Peter Maxwell, IEEE fellow and senior member of the Technical Staff at ON Semiconductor. “We have found that the bridge component alone reduces scan-related DPPMs by more than 700 compared even to cell-aware patterns, and cell-neighborhood patterns can be used to reduce DPPMs even further. In the automotive environment of defects per billion, even defects with low probability of occurrence need to be targeted in manufacturing test.”
The automotive-grade ATPG capability in the Tessent TestKompress product is a result of more than 10 years of research in cell-aware test and modeling, and has been developed in collaboration with foundries, fabless companies and integrated device manufacturers (IDMs). The value of the discrete automotive-grade ATPG technologies has been documented in several technical publications, and demonstrated on millions of tested devices representing mature planar process nodes, as well as state-of-the-art FinFET processes.
“With the adoption of FinFET processes and 3D transistor structures, we see new failure modes that must be addressed by IC testing,” said Brady Benware, senior marketing director for the Tessent product family at Mentor, a Siemens business. “Simultaneously, there are more entrants to the automotive and other IC markets that must meet automotive-grade quality requirements. This increases the need for manufacturing test patterns that detect a thorough range of defects. The automotive-grade ATPG capability in Tessent TestKompress allows digital IC makers to increase manufacturing test quality while minimizing manufacturing test cost.”
By combining automotive-grade ATPG with embedded deterministic test (EDT) compression and VersaPoint™ test points, TestKompress users can meet both cost and test-quality requirements. Tessent TestKompress Automotive-grade ATPG can be combined with Tessent Diagnosis cell-aware and layout-aware diagnosis for a complete end-to-end defect detection and diagnosis solution. All Tessent products are part of the Mentor Safe program and qualified for all ASIL ISO 26262 projects with a complete set of certified ISO 26262 documentation.
ON Semiconductor and other customers will present their experience using Tessent TestKompress with Automotive-grade ATPG during the International Test Conference (ITC) October 30 - November 1, 2018, Phoenix Convention Center, Phoenix, AZ.
To learn more about automotive-grade ATPG technology in the Tessent TestKompress product, visit https://www.mentor.com/products/silicon-yield/products/testkompress.