17 February 2016

Mentor Graphics Signs Multi-year Agreement with ARM for Early Access to ARM IP to Accelerate SoC Verification, Implementation and Testing


  • Optimized Mentor® verification, implementation and test tools and methodologies will help mutual customers design with ARM® IP
  • Multi-year subscription agreement gives Mentor early access to ARMv8-A and ARMv7-A architectures, ARM Mali™ graphics processors, ARM CoreLink™ system IP, ARM Artisan® physical IP and ARM POP™ IP
  • Agreement spans the Veloce® emulation platform, Questa® verification platform, RealTime Designer™ and Olympus-SoC™ Netlist-to-GDSII system, and Tessent® product suite

WILSONVILLE, Ore. USA and Cambridge, UK, February 17, 2016 - Mentor Graphics Corp. (NASDAQ: MENT) has signed a multi-year subscription agreement with ARM (LON: ARM; Nasdaq: ARMH) to enable early access to a broad range of ARM intellectual property (IP) and related technologies. This will enable Mentor to optimize its tools and methodologies for ARM-based system-on-chip (SoC) designs. Mentor will have access to ARM Cortex® processors for the ARMv8-A and ARMv7-A architectures, ARM Mali graphics processors, ARM CoreLink system IP, ARM Artisan physical IP and ARM POP IP for implementation acceleration.

“Our close collaboration with Mentor Graphics has enabled some of the world’s most advanced electronics companies to create a range of market-defining products,” said Pete Hutton, executive vice president and president of product groups, ARM. “This agreement expands our commitment to provide our mutual customers with comprehensive tools to design, implement and verify their SoCs.”

Through this agreement, Mentor can optimize its flows and tools for ARM IP before it is available on general release. This will enable Mentor’s customers to add the latest ARM IP to their designs and trust their verification, implementation and test environments are fully optimized. This will allow them to achieve the highest levels of performance and functionality in their newest ASIC and FPGA designs.

ARM, in common with many companies in the ARM ecosystem, uses the Mentor Enterprise Verification Platform™ (EVP), including the Veloce and Questa platforms, to verify new processor IP and system IP designs. For digital design implementation, the agreement will help Mentor optimize RealTime Designer physical RTL synthesis and Olympus-SoC Place & Route solutions for ARM-based designs. For IC test generation, processor-specific optimizations to the Tessent MemoryBIST, LogicBIST and TestKompress® flows will also be available and validated.

“Mentor and ARM have collaborated for years to help top semiconductor companies in bringing ARM-based products to market,” said Brian Derrick, Mentor vice president of marketing. “This agreement moves us to a higher level of cooperation and optimization, so we give our customers even higher confidence of success as they move to next generation products for IoT, mobile and other markets demanding low power and high performance.”

(Mentor Graphics, Mentor, Questa, Veloce, Tessent and TestKompress are registered trademarks and Enterprise Verification Platform, RealTime Designer, and Olympus-SoC are trademarks of Mentor Graphics Corporation.

(ARM, Artisan and Cortex are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. CoreLink, Mali and POP are trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved.)

(All other company or product names are the registered trademarks or trademarks of their respective owners.)

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