Smart Verification: Faster is not enough!
This keynote will explores the vital role of smarter solutions in the design and verification process. We will boldly discuss the limitations of solely relying on speed, and shine a spotlight on the pressing demand for tackling intricate design and verification challenges with intelligent solutions.
Wednesday, September 13, 10:00–10:30
Revolutionizing System-Level Verification and Validation: Implications for India's Innovation Drive
Thursday, Sept. 14, 10:15–11:15
The government’s plan to transform to a nation of research, locally designed products, and innovation is taking shape. In this panel we will look at opportunities for semiconductor and system-level verification and validation; and how IP and services companies can expand in new ways.
Reetika NLN, Siemens; Sulabh Kumar Khare, Siemens
Thursday, September 14, 17:15–17:45, 4C3 – [2722]
Inayat Ali, NXP; Rajagopal Anantharaman, Siemens; Manish Bhati, Siemens